This invention relates to an insulated gate field effect device, especially a vertical insulated gate field effect device capable of withstanding high reverse voltages when non-conducting.
It is well known in the semiconductor art that the reverse voltage withstanding capability of a vertical insulated gate field effect device can be increased by reducing the dopant concentration and increasing the size of the drain drift region. However, this also increases the resistivity and length of the majority charge carrier path through the device when the device is conducting. This means that the series resistivity of the current path for majority charge carriers through the device, and thus the on-resistance of the insulated gate field effect device, increases in proportion to approximately the square of the desired reverse breakdown voltage.
U.S. Pat. No. 4,754,310 (our reference PHB32740) addresses this problem by providing the drain drift region as a zone formed of first regions of one conductivity type interposed with second regions of the opposite conductivity type with the dopant concentrations and dimensions of the first and second regions being such that, when the device is reversed biased in operation and the zone is depleted of free charge carriers, the space charge per unit area in the first and second regions balances at least to the extent that the electric field resulting from the space charge is less than the critical field strength at which avalanche breakdown would occur. This enables the required reverse breakdown voltage characteristics to be obtained using interposed semiconductor regions which individually have a higher dopant concentration, and thus lower resistivity, than would otherwise be required so that the series resistivity of the first and second regions and thus the on-resistance of the device can be lower than for conventional devices.
It is an aim of the present invention to provide another way of improving the trade off between breakdown voltage and on resistance in vertical high voltage insulated gate field effect devices where the word xe2x80x9cverticalxe2x80x9d should be understood to mean that the main current flow path through the device is between first and second main opposed surfaces of the device.
According to one aspect of the present invention there is provided a vertical insulated field effect device, such as a MOSFET, wherein the drain drift region has dispersed therein a plurality of semi-insulative regions extending substantially in the direction of the main majority charge carrier path through the drain drift region, the semi-insulative regions adjoining source regions of the device to provide a current leakage path from the source regions through the drain drift region to cause, when the device is non-conducting and a voltage is applied between its main electrodes in use, the depletion region within the drain drift region to spread to a greater extent than it would have done without the presence of the semi-insulative regions.
According to one aspect of the present invention there is provided a vertical insulated field effect device, such as a MOSFET, wherein a drain drift region has dispersed therein a plurality of semi-insulative or resistive paths extending substantially in the direction of the main majority charge carrier path through the drain drift region and electrically coupled to source regions of the MOSFET so as to provide current leakage paths from the source regions to cause, when the device is non-conducting and a voltage is applied between its main electrodes in use, the depletion region within the drain drift region to spread to a greater extent than it would have done without the presence of the paths.
According to an aspect of the present invention, there is provided an insulated gate field effect device as set out in claim 1.
The present invention thus enables an insulated gate field effect device to be provided which enables the trade off between reverse breakdown voltage and on resistance to be improved in a manner that is different from that proposed in U.S. Pat. No. 4,754,310 and that may, at least in certain circumstances, be simpler and/or more economical to manufacture.
Other advantageous technical features in accordance with the present invention are set out in the appended dependent claims.